PPG Multicontrol Keyboard (323)

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The PPG digital keyboards were a completely new approach in controlling analog modular synthesizers. While most other manufacturers(*) used resistor strings, sample&hold circuits and eventually means of analog computation to achieve polyphony, Wolfgang Palm of PPG went the digital way. This allows for completely new voice assignment schemes and complete pitch stability after a key is released.

The references I found vary a bit in functionality. A Duophonic Keyboard 322 I found on the web for example has one switch setting for monophony, duophony, split mode and a button-activated memory mode, which is also described in the “INFO MAPPE SYNTHESIZER MODUL SYSTEM 300er SERIE” from December 1976. Also in this publication there’s a photo of a multicontrol keyboard similar to the one described in this post.

It came to me in parts, with lots of the internal wiring cut and rewired for some unknown purpose. The goal is to restore full original function, while adding the previously removed internal power supply, and to reverse engineer all of its circuitry to create some documentation also for its usage from this.

(*) Oberheim used a digitally scanned keyboard around the same time in the FVS, but there are probably not many more examples.

Before I start over with individual posts showing the functional units of the keyboard, here is a first impression of how it came to me and how important a careful disassembly, documentation and restoration will be.

Keyboard electronics

The keyboard is based on a rather typical J-wire style keyboard. 49 J-wires are sequentially pulled to ground by means of a counter/decoder circuit on the keyboard assembly itself. This is synchronized by several signal lines with the keyboard assigner circuit on one PCB below the left hand control panel.

Circuit description

For all circuit descriptions I will use my redrawn schematics attached to the post. The part designators are randomly chosen as none of the original PCBs has component designators of any kind.

The whole scanning of the keyboard including the storing and assigning of key data is clocked by a 555 timer IC running at 14.6kHz with an almost symmetric output. This clock is fed to the assigner circuit by the grey wire connected to pin 6 of the multi-pin connector. Simultaneously it clocks a cascade of two SN7493 4-bit counters.
They are arranged that 6 outputs define 64 time slots of 68.5µs, so a whole scan cycle takes 4.4ms. The lower three bit are connected to the ABC inputs of 7 SN7445 BCD decoders, while the upper three drive another SN7445 which in turn enables one out of the 7 other 7445. As the Q0 output of the latter 7445 is unused, the actual keys are mapped to the time slots 8 to 56.
The last decoder output, which goes low in the 63rd time slot and is used for synchronization purposes via the blue wire on pin 9 of the connector. Additional timing information is derived from the 6th bit of the counters (U3 pin 8) which, via the white wire on pin 1, indicates whether the lower (key 1-24) or higher (key 25-49) half of the keyboard is currently scanned. This is obviously necessary to allow for split assignment.
U3 pin 11, the 7th bit which is not used for the keyboard itself, is also sent via pin 2, brown wire, to the assigner circuit. This plays an important role in the control circuit for the key memories as the actual key data is only interpreted in every other scan cycle, so the real scan time becomes 8.8ms rather than the previously mentioned 4.4ms. The pink wire on pin 7 carries the actual key data, it becomes low for every timeslot in which the associated key is pressed.

Schematic of the keyboard circuit

Key assigner

The key assigner allows to generate two independent control voltages and gate signals from the time multiplexed data from the keyboard circuit. Each output can be selected between two monophonic, two duophonic and two key-split modes with a fixed split point between key 24 and 25 (see above).

To achieve this, the pulse train from the keyboard is stored in two 64 bit serial shift registers (Texas Instruments TMS3417). Those are controlled using the synchronization signals from the keyboard circuit, the mode switches on the front panel and a circuit defining whether the real time keyboard data or the recirculated output is fed into the registers.
The shit register output, together with additional control signals, are fed to a second PCB which converts the pulses (not parallel digital data!) to the precise control voltages.

A detailed circuit description follows.

PPG 390 Drum Unit

One of the most rare PPG units found its way to my workshop recently: the 390 Drum Unit.
PPG 390 Drum Unit

Basically, this is a very rudimentary 8 bit sample player. It features 8 drum sounds in EPROMs on 4 voice cards. Two clock sources drive the address counters on the boards, which means that Sample Freq 1 defines the sampling rate of the odd channels, while Sample Freq 2 is in duty for the even numbered instruments.
[Block diagram to follow…]

Upon arrival one card was missing, instead I found a non working wire-wrapped vero board with a prototype for a single 4kByte instrument in two 2716s, and two 2732 EPROMs with instruments samples that won’t fit anywhere. I designed a PCB to replace the missing voice card, providing sockets for 2764 EPROMs so experimenting with other samples woule be easier as they can be programmes with cheap USB programmers.

PPG 390 Voice Card

Once completed the design I realized that I cloned the original cards so perfectly that I still don’t have a use for the 2732s – but my layout provides an easy solution, with two piggy-packed 4040 counters and some wires I modified my new voice card to work with the Noise and Hi-Hat EPROMs. Some more wires would allow to experiment with 2764 or even bigger EPROMs.

The clock frequencies are in the range of 13 to 30kHz, so the sound duration is between 70 and 160ms for the originally used 2716 EPROMs and 140 to 320ms for the 2732 sounds and would scale accordingly when using a larger EPROM.

PPG 390 Overview

Apart from this addition, the cards got guides (the blue things) to protect the connectors, new capacitors, additional capacitors in the output lines (originally it had a 3V DC offset), a new transformer, IEC mains jack, a mains fuse and a mains wiring according to current standards.

It is probably not an impressive drum unit sound-wise, but an interesting collectors item and I somewhat like the shaker … 😉

Posted in PPG

PPG 1020: Digital keyboard?

The PPG 1020 is known as the stable successor of the 1002 synthesizer. This was achieved by use of a special oscillator architecture that combines digital octave division and a closed-loop approach including a VCO. The VCO covers the whole range(4 keyboard octaves + approx one more for the “digital modulation” feature), but being within a closed loop, it is stabilized to some degree. The details will be topic of a later blog post. For now we only need to know that we need a digital word that determines the octave and a control voltage to drive the VCO to one out of 12 semitones.

Even without the use of a processor (the 1020 does not have a computer of any kind) it would be straight forward: scan the 49 keys, somehow divide the number of the pressed key modulo 12, the result will be the (already digital) octave number, the remainder drives a DAC to generate the CV.

This “somehow” was actually done by using synchronously counting registers – a chain of 2 binary counters, one turning over at 12, the other incrementing whenever the first one turns over, and a chain of shift registers scanning the keys. The first “high” (pressed key) in the serial pulse train from the shift registers will latch the counter outputs in the next cycle, so we have a low-note priority here.

The counters mentioned above drive the octave control word and a digital-to-analog converter built from two 4051 multiplexers and a chain of accordingly weighted resistors. The reference voltage to that chain is generated on the main board and derived from the setting of the tune knob and the pitch bend slider.

For modulation purposes, an offset is digitally imposed. Since the modulation source from the main board is an analog control voltage, analog-to-digital conversion is necessary. A discrete A/D converter was built from a constant current source generating a linear voltage ramp on a capacitor. This slope is than compared with the modulation voltage in order to reset the above mentioned counters, thereby shifting the generated octave control word and the control voltage. With this approach it is possible to modulate the pitch across an octave border, whereas the analog part of the oscillator control would be limited to variation within an octave.

The comparator in this A/D converter is built from discrete transistors, yet integrated into a CA3086. The same circuit, but under processor control, can be found on the analog panel board (ANIN) of the Wave Computer 360!

Here’s the component side of the keyboard PCB:
PPG 1020 keyboard PCB components side

While the copper areas in the right top and middle right are of no electrical use, the long copper stripe on the lower edge is actively driven by a delayed clock signal. One might wonder what the reason for this could be – a view on the solder side and some circuit analysis reveals the secret:
PPG 1020 keyboard PCB solder side

Every key has a 2x1cm big copper area connected to the J-wire on the opposite side. Electrically, each key is capacitively coupled to a delayed clock signal – a signal that is logical “0” whenever the shift registers sample the key lines. This loose coupling is easily overriden by a J-wire touching the bus bar, which is connected to the positive supply voltage by a resistor of just 1k.

The last question about this is: was this only done to eliminate the need for 49 pull down resistors (the shift registers are CMOS devices and would not work properly with open inputs), or were other aspects like debouncing in mind?

A 3.3meg resistor added between one key line and ground suggests that the capacitive pull-down idea did not work 100%.

 

Wave Thinking

Today I analyzed a PROZ84 board from a 2.3 with some “odd” sounds.
There was audible distortion, varying with the pitch and the partial wave number.

The oscilloscope revealed (sorry, no image here) that in cases of highest distortion levels only every other sample appeared on the DAC outputs, while the others were at ~0 volts. Half of the partial wave samples having a value of zero is hardly a problem of the wavetable playback, but most likely to be caused by wrong data in the wave RAM.

It turned out that one of the 74S257’s multiplexers outputs in the write circuit had a stuck low output on RAM address line A0, so only even samples were actually written into RAM, with the odd locations containing what is left in the DRAM’s capacitors – in this case, 0.

 

Update for the Wave 2 modern display firmware

Lately LCD modules showed up that do not comply with the unwritten standard that returning the cursor to home position on a non-shifted display will not take longer than 40 microseconds. The datasheet of the HD44780 controller chip clearly says 40µs up to 1.64ms, with the latter being common for un-shifting shifted displays. A display taking longer than approx 53µs for executing the home command, erratic behaviour will occur.

As the controller originally used in the Wave 2 does not know about shifting, the problem was solved by using a command to explicitely set the cursor position to 0 (zero) instead of the home command.

Here’s the result:

 

Another 360A leaves the lab

The next PPG 360A has just left the workshop. It seems that all 360A that have been sitting around for years or maybe decades will need several hours of troubleshooting and repair and a bunch of 15..20 ICs.
Fortunately most of the parts are easily available, and the next one is already in work.

As you can see, two boards are missing – between IO and TONRAM there is one of my RAMPROM replacement boards hiding. Less ICs to fail, less power, less heat.

Testing the ELTEC

The PPG Waveterm A was built around an industry processor board named EUROCOM II V7 made by ELTEC. Based on a 6809 CPU it contains two 6821 PIAs, a 6850 ACIA with baud rate generator, a 1793 FDC controller, 64k of dynamic RAM and two 4k ROM sockets. One out of three 16k memory pages can be mapped to the integrated discrete monochrom graphics controller.

Due to the complexity it can become rather complicated to trouble shoot those boards. As lots of counters and other TTL ICs are required for the memory to work properly, chances are good that an application’s firmware won’t run due to memory problems.

For the software I’ve created only the CPU, ACIA and baud rate generator need to work. The first routines run completely within the CPU registers and do not require any RAM.
Once started, a welcome message should appear on the connected terminal. If not, basic 6809 system troubleshooting needs to take place.

As soon as the terminal comes to live, the first 4k of RAM will be checked by a AA/55 pattern. If a mismatch occurs, the routine will stop and the original and read bit pattern is displayed.
Assuming the first memory page is in good condition, the stack pointer is initialized and a menu appears.

For now, four tasks are available:
1. Memory test. The whole memory between 1000 and EFFF will be tested, an error will be displayed with the actual address, the written and the read bit patterns. The test will run forever.
2. PIA output. All 8 bit PIA ports show a square wave with a frequency of 19.2kHz on PA0/PB0 decreasing to 150Hz on PA7/PB7.
3. PIA input. Binary patterns of all four 8 bit ports are displayed continuously.
4. Screen test. A test image will be show.

To Do’s:
– add two more test screens, switchable using the page select lines
– add a test for the hardware scrolling functions
– keep away from the FDC, this will have to be troubleshooted in the target system if necessary

ELTEC Eurocom II V7 board under test

A first impression of a Eurocom II on the emulator